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Role Summary
We are looking for an experienced Principal Analog Design Engineer to drive the design and delivery of high‑speed interface IPs, with a strong emphasis on Die‑to‑Die (D2D) interconnects based on the UCIe standard and advanced package technologies. The role requires hands‑on ownership from architecture through silicon bring‑up, working closely with layout, verification, package, and system teams.
What you'll do
Architect, design, and deliver high‑speed analog / mixed‑signal circuits for Die‑to‑Die and chiplet‑based systems, including UCIe‑compliant interfaces.
Own analog blocks for high‑speed interfaces such as clocking, TX/RX front‑ends, termination schemes, biasing, and equalization support circuits.
Drive architecture definition, feasibility analysis, and design trade‑offs considering signal integrity, power, noise, and packaging parasitics.
Perform schematic design, simulation, and optimization across PVT corners using industry‑standard EDA tools.