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Job Description
About the role
Job Details:
Intel Central Engineering Group (CEG) team delivers best-in-class Ethernet products and is at the heart of Intel's transformation from a PC company to a company that powers the cloud and billions of smart, connected computing devices. CEG's compelling Ethernet products move the world's data and are the foundations of cloud service and telecommunications data centers. You will be exposed to High-Speed I/O protocols such as PCIeGen6-7, DDR5-6, and PAM4 Ethernet 224Gb, which are a part of our Ethernet Infrastructure Processing Unit (Intel IPU) and Foundation NIC (FNIC) Ethernet product lines. We propose a dynamic and flexible workplace position, working directly with highly capable design, system, and pre/post-silicon teams within the organization.
Most of the team's engineers have 10+ years of experience, and we are looking for a highly skilled multidisciplinary engineer with proven experience in electrical and system engineering to lead the hardware design of our next division projects' challenges and be part of Ethernet networking's accelerated growth.
The role requires high-frequency signal and power integrity and a good understanding of RF circuits and electromagnetic wave propagation. It includes learning the specifications of each interface and the required design limitations that should be verified. You will lead a team of developers and develop yourself digital and analog circuit boards for use in HW-Engineering products. In this position, your responsibilities include but are not limited to developing board design from schematic through leading the Silicon power-on hardware enablement and debug and may interface with other board design and test module development teams to drive innovation initiatives. You would also be responsible for identifying/qualifying new hardware solutions; providing technical leadership to working groups/task forces to resolve hardware, schematics, layout, and DFx issues through debugging and reviews; and part/component selection management.
B.Sc./M.Sc. Electrical Engineer with over 10 years of relevant experience
Proven design experience in the semiconductor ASIC development industry is a MUST
Proven planning and design-flows buildup
Proven experience with PCB technology and layout technics (Analog and Digital) including stack-up, placement, routing, and advance SI/PI consideration
Knowledge of signal integrity, transmission line theory, analog circuits, and high-speed
signal processing
FPGA and Verilog coding skills
Excellent debugging skills, ability to analyze problems, diagnose the root cause and apply corrective actions
Lab hands-on experience in high-speed, low-speed, and clocks circuitry signal measurements
Experience with debugging at circuit board-level problems in analog and digital domains using lab test equipment
Operating test equipment such as high-end Oscilloscopes, VNA, TDR, BERT's, etc.
Programming skills in one or more language such C++/python/MATLAB
Working experience with AI-based tools
Ability to work as a team player and contribute in a cross-functional product team on a daily basis
Strong verbal and written communication skills in English for interacting with design, evaluation and production engineers; customers; technical marketing engineers; and program managers
Comprehensive understanding of system architecture
Job Type:
Experienced Hire
Shift:
Shift 1 (Israel)
Primary Location:
Israel, Petah-Tikva
Additional Locations:
Posting Statement:
All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.
Position of Trust
N/A
Work Model for this Role
This role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.