Develop C and C++ based test content, low-level drivers and custom firmware at the subsystem and SoC levels, including self-checking tests that run on embedded processors.
Extend the compile and build flow to support custom Firmware-style tests
Serve as a technical owner for the team's FPGA prototyping platform (such as HAPS or Xilinx): create board images and bit files. Design additional custom FPGA RTL for protocol interfaces and feature enablement. Release stable platforms to the firmware team and keep them working as the design evolves.
Develop and extend custom python tooling to interface with the FPGA platform.
Debug FPGA and post-silicon issues using tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
Drive post-silicon bring-up and validation in the lab, run the validation suites on first silicon, meet bring-up exit criteria on schedule, and debug platform issues such as JTAG failures, UART connectivity, and boot failures alongside the design, firmware, hardware and security teams.
Root-cause failing post-silicon tests to closure, collecting and analyzing scan dumps for low-level issues such as boot ROM and built-in self-test bugs, coordinating cross-team debug, and delivering fixes such as handling fatal errors, correcting driver access violations, and reconciling registers modified by boot firmware.
Requirements
Experience developing C and C++ test content for subsystem and SoC verification, including bare-metal and firmware style tests, with working knowledge of SystemVerilog testbenches.
Experience bringing up and maintaining FPGA prototyping or emulation platforms (such as HAPS or Xilinx), including board images, platform tooling, and testbench changes that enable firmware and validation teams.
Hands-on hardware debug experience with tools such as JTAG debuggers, logic analyzers, oscilloscopes, and multimeters.
Experience with post-silicon verification of IP, subsystems, or SoCs through the full cycle, including test planning, test development, failure debug, and coverage signoff.
Experience with post-silicon bring-up and validation, including running test test suites on silicon and debugging boot, platform, and connectivity issues in a lab environment.
Proficiency in Python, or a similar scripting languages such as Perl or Ruby, for test automation, build flows, and log or data parsing.
In-depth knowledge of verification principles, testbench architecture and stimulus generation, with a track record of debugging complex designs.
Experience with industry protocols such as AMBA (AXI/AHB/APB), JTAG, SPI, I2C/I3C and USB.
Experience collaborating across architecture, design, firmware, and validation teams, with strong communication skills.
Strong understanding of silicon and/or computer architecture.
What’s In It for You:
At Arrow, we recognize that financial rewards and great benefits are important aspects of an ideal job. That’s why we offer competitive financial compensation, including various compensation plans and a solid benefits package.
Medical, Dental, Vision Insurance
401k, With Matching Contributions
Short-Term/Long-Term Disability Insurance
Health Savings Account (HSA)/Health Reimbursement Account (HRA) Options
Paid Time Off (including sick, holiday, vacation, etc.)
Tuition Reimbursement
Growth Opportunities
And more!
Work Arrangement Fully On-Site: Must be able to travel to an Arrow Client office location as requested by Arrow Client leadership.
Location: Complete On-Site at Mountain view CA.
About eInfochips:
eInfochips, an Arrow company (Fortune #133), is a leading global provider of product engineering and semiconductor design services. A rich history of over two decades, with over 500+ products developed and 40M deployments in 140 countries, eInfochips continues to fuel technological innovations in multiple verticals. eInfochips has strategic technology partnerships with Qualcomm, NVIDIA, NXP, Analog Devices, Texas Instruments, Amazon, Microsoft and Google to name a few. Along with Arrow’s $38B in revenues, 22,000 employees, and 345 locations serving over 80 countries, eInfochips is primed to accelerate connected products innovation for 150,000+ global clients. eInfochips acts as a catalyst to Arrow’s Sensor-to-Sunset initiative and offers complete edge-to-cloud capabilities for its clients. Please visit www.einfochips.com for our portfolio of product engineering services across various industries & verticals.
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy).
Location:
US-CA-Mountain View, California (Microsoft)
Time Type:
Full time
Job Category:
Engineering Services
EEO Statement:
Arrow is an equal opportunity employer. All applicants will be considered for employment without attention to race, color, religion, gender, age, sexual orientation, gender identity, national origin, veteran or disability status. (Arrow EEO/AAP policy)
All Arrow job postings are for existing job vacancies. We anticipate this requisition will be open for a minimum of five days, though it may be open for a longer period of time. We encourage your prompt application.