Description
Quantum Machines is a global leader in control systems for quantum computing, a field on the verge of exponential growth, bringing about opportunities like those made possible with the invention of classical computing 50 years ago. At QM, we provide the world’s most leading researchers and organizations with the critical tools they need to develop useful quantum computers. QM’s hardware and software represent a new paradigm for controlling quantum computers, from a single qubit to hundreds and thousands. We are assembling the strongest team of professionals in the world with the goal of revolutionizing how quantum computers are built and controlled and accelerating their arrival. Quantum Machines is backed by globally recognized venture capital sponsors, including TLV Partners, Battery Ventures, Red Dot Capital Partners, Avigdor Willenz’ investment group, Harel Insurance, and others.
We are looking for an excellent design engineer to join our team and build QM's state-of-the-art control and orchestration platform. We are looking for a highly talented and motivated person, who is a real team player and which can collaborate closely with engineers from other disciplines and quantum physicists
Responsibilities:
Designing a configurable and very low-latency challenging RTL
Bringing the state-of-the-art FPGA to its limits with regards to logic & timing optimization
End2end ownership of the entire coding process (Arch->uArch->Design->Implementation)
Learning system and SW requirements for proper implementation of HW-SW interface
Requirements:
BSc in electrical/computer engineering or relevant military background
At least 4 years of experience
Proven track record in RTL coding with System Verilog
Experience with System Verilog
VCS, Vivado - Advantage