Optical Communication Systems, Senior Staff Engineer at Marvell · Trevo

Job description

About the role

About Marvell Marvell’s semiconductor solutions are the essential building blocks of the data infrastructure that connects our world. Across enterprise, cloud and AI, and carrier architectures, our innovative technology is enabling new possibilities. At Marvell, you can affect the arc of individual lives, lift the trajectory of entire industries, and fuel the transformative potential of tomorrow. For those looking to make their mark on purposeful and enduring innovation, above and beyond fleeting trends, Marvell is a place to thrive, learn, and lead. Your Team, Your Impact Your team develops silicon photonics-based optical engines and components at the heart of next-generation AI and data center infrastructure, directly shaping how AI systems connect and scale. You will work at the intersection of silicon photonics, advanced packaging, and high-speed electronics. Join a group of curious, highly motivated engineers embedded in a culture that is flexible, open, highly international, and genuinely people-centered. Zurich consistently ranks among the world’s top cities for quality of life and is one of Europe’s leading technology hubs, seamlessly combining innovation with exceptional living standards. What You Can Expect Own the end-to-end architecture and performance of the electro-optical transmit path: from the electrical driver interface, through the PIC and package, to the optical output (at 400G/lane CPO and beyond) Define and partition system-level specifications and budgets across the digital, analog, electro-optical domains; translate link targets (BER, SNR/OSNR, OMA, TDECQ) into component-level requirements Model and predict end-to-end optical link performance via eye diagrams, constellation diagrams, and impairment analysis, and quantify how equalization and DSP (FFE, DFE, CTLE, and coherent DSP functions) shape achievable performance Support co-design and technical alignment across photonics, analog/ASIC design, and packaging teams to optimize performance, power efficiency, and signal integrity. Plan, execute, and lead characterization and qualification of electro-optical components and integrated systems; define test methodologies and acceptance criteria Analyze measurement data to identify performance limitations; lead root-cause analysis of complex signal integrity issues across electrical and optical domains, and translate findings into design improvements Represent system-level requirements in architecture and interface definition; ensure designs align with industry standards (IEEE 802.3, OIF CEI) and customer specifications

Master’s degree or PhD in Electrical Engineering, Photonics, or a related field, with 3+ years of industry experience in a high-tech engineering environment
Strong background in optical communications (coherent and/or IM/DD) or high-frequency electrical/electro-optical characterization (>110 GHz). Demonstrated experience with link-level performance analysis via eye diagrams, constellation diagrams, BER, SNR/OSNR, OMA, and TDECQ
Solid understanding of RF/microwave engineering, signal integrity, high-frequency circuit theory, interconnects, silicon photonics, and semiconductor packaging
Strong ownership mindset with the ability to operate autonomously in a fast-paced environment
Collaborative approach with the ability to influence cross-functional teams and drive technical alignment
Excellent communication skills, with the ability to explain complex topics clearly to diverse audiences
Proven track record of delivering high-quality results in ambiguous or evolving environments
In-depth experience in two or more of the following:
High-speed link modeling, channel budgets, and equalization techniques (FFE, DFE, CTLE)
Interfacing with high-speed SerDes (≥200G PAM4, ideally 400G PAM4) and familiarity with industry standards (IEEE 802.3, OIF CEI)
High-frequency characterization and data modulation (VNA, AWG, PPG, oscilloscope, DCA, BERT)
Python or MATLAB for lab automation, data analysis, or system simulation
3D EM modeling and simulation (HFSS preferred), high-frequency circuit simulation (ADS preferred), and/or RF PCB design
Advanced packaging and/or 2.5D/3D integration in optical platforms
Additional Compensation and Benefit Elements
With competitive compensation and great benefits, you will enjoy our workstyle within an environment of shared collaboration, transparency, and inclusivity. We’re dedicated to giving our people the tools and resources they need to succeed in doing work that matters, and to grow and develop with us. For additional information on what it’s like to work at Marvell, visit our Careers page.
All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, national origin, sexual orientation, gender identity, disability or protected veteran status.
Interview Integrity
To support fair and authentic hiring practices, candidates are not permitted to use AI tools (such as transcription apps, real-time answer generators like ChatGPT or Copilot, or automated note-taking bots) during interviews.
These tools must not be used to record, assist with, or enhance responses in any way. Our interviews are designed to evaluate your individual experience, thought process, and communication skills in real time. Use of AI tools without prior instruction from the interviewer will result in disqualification from the hiring process.
This position may require access to technology and/or software subject to U.S. export control laws and regulations, including the Export Administration Regulations (EAR). As such, applicants must be eligible to access export-controlled information as defined under applicable law. Marvell may be required to obtain export licensing approval from the U.S. Department of Commerce and/or the U.S. Department of State. Except for U.S. citizens, lawful permanent residents, or protected individuals as defined by 8 U.S.C. 1324b(a)(3), all applicants may be subject to an export license review process prior to employment.
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Tech stack