Job Details:
The world is transforming - and so is Intel. Intel is a company of bold and curious inventors and problem solvers who create some of the most astounding technology advancements and experiences in the world. With a legacy of relentless innovation and a commitment to bring smart, connected devices to every person on Earth, our diverse and brilliant teams are continually searching for tomorrow's technology and revel in the challenge that changing the world for the better brings. We work every single day to design and manufacture silicon products that empower people's digital lives. Come join us and do something wonderful.
The Opportunity
For nearly a decade, Intel's Neuromorphic Computing Lab-together with a global ecosystem of 250+ research groups-has explored architectures, algorithms, and software inspired by the brain's extraordinary efficiency, scalability, and adaptability. Our Loihi series of research chips pioneered event-driven, sparse, and massively parallel neuro-inspired processing, fueling over 100 peer-reviewed publications that validate the promise of this novel approach.
Now, we're entering an exciting new chapter: transforming these breakthroughs into real-world products that will power the coming era of physical AI systems-beyond the reach of GPUs and mainstream AI accelerators.
If you are passionate about pushing the boundaries of computing, from transistor-level innovation to software abstractions, join us. Help define the next wave of AI technology that harnesses the proven advantages of Intel's neuromorphic computing technology with the versatility demanded by modern AI workloads.
Position Overview
We are seeking a senior physical design engineer who is passionate about driving innovation at the intersection of advanced semiconductor technologies, physical AI and next-generation computing architectures. As a member of Intel's neuromorphic silicon team, you will engineer physical integration solutions spanning chiplet and advanced packaging technologies. In this hands-on role, you will help overcome the performance, area, and power limitations of today's AI architectures. You will also lead block- and chip-level closure activities, driving designs to achieve their performance, power, and area targets. An openness to learning new technologies and methodologies, such as asynchronous design techniques and AI-driven automation and debug, is essential.