תיאור המשרה
Description
NextSilicon is reimagining high-performance computing (HPC & AI). Our accelerated compute solutions leverage intelligent adaptive algorithms to vastly accelerate supercomputers, driving them forward into a new generation. We have developed a novel software-defined hardware architecture that is achieving significant advancements in both the HPC and AI domains.
At NextSilicon, everything we do is guided by three core values:
Professionalism: We strive for exceptional results through professionalism and unwavering dedication to quality and performance.
Unity: Collaboration is key to success. That's why we foster a work environment where every employee can feel valued and heard.
Impact: We're passionate about developing technologies that make a meaningful impact on industries, communities, and individuals worldwide.
NextSilicon is looking for a talented and experienced design manager to drive and help our group to get to the next era of computer architecture. In this position, you will design the critical parts of NextSilicon’s future chips. You will be involved in the full design cycle from architectural requirements into micro-architectural specs, implement key blocks in RTL, and participate in post-silicon activities.
Requirements
B.Sc. in Electrical Engineering or Computer Science
8+ years of digital design experience with complex blocks
5+ years as a design team leader
Ability to transform requirements into specification documents
Proven record in high-speed and low-power design
Experience in front-end tools and analysis: CDC, LINT, power, simulation
Experience in network design (ETH) is an advantage
Responsibilities
Be accountable for your team's milestones & timelines
Leading your team members and developing their abilities
Technology expert, building a knowledge base for the group
Work with various teams to drive execution (SW, Architecture, verification, BE, etc)
Devise execution indicators, monitor and report execution progress to enable prioritization and clear decision-making
Acquire the system Architecture and be part of the leading technical FE forum
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